<rss version="2.0">
    <channel>
        <title>FPGA</title>
        <link>http://cid-fde2b41588160e26.skydrive.live.com/browse.aspx/FPGA</link>
        <description />
        <ttl>240</ttl>
        <item>
            <title>DSP_Tools_9.2.01.1028.part1.rar</title>
            <link>http://cid-fde2b41588160e26.skydrive.live.com/self.aspx/FPGA/DSP^_Tools^_9.2.01.1028.part1.rar</link>
            <pubDate>Fri, 27 Jun 2008 04:26:37 GMT</pubDate>
            <description>&lt;img src="http&amp;#58;&amp;#47;&amp;#47;msc.wlxrs.com&amp;#47;Yab6BLiyg7PTichbq0kh4A&amp;#47;images&amp;#47;icons&amp;#47;Small&amp;#47;Zip.png" alt="DSP_Tools_9.2.01.1028.part1.rar" /&gt;</description>
        </item>
        <item>
            <title>DSP_Tools_9.2.01.1028.part2.rar</title>
            <link>http://cid-fde2b41588160e26.skydrive.live.com/self.aspx/FPGA/DSP^_Tools^_9.2.01.1028.part2.rar</link>
            <pubDate>Fri, 27 Jun 2008 04:26:39 GMT</pubDate>
            <description>&lt;img src="http&amp;#58;&amp;#47;&amp;#47;msc.wlxrs.com&amp;#47;Yab6BLiyg7PTichbq0kh4A&amp;#47;images&amp;#47;icons&amp;#47;Small&amp;#47;Zip.png" alt="DSP_Tools_9.2.01.1028.part2.rar" /&gt;</description>
        </item>
        <item>
            <title>DSP_Tools_9.2.01.1028.part3.rar</title>
            <link>http://cid-fde2b41588160e26.skydrive.live.com/self.aspx/FPGA/DSP^_Tools^_9.2.01.1028.part3.rar</link>
            <pubDate>Fri, 27 Jun 2008 04:26:40 GMT</pubDate>
            <description>&lt;img src="http&amp;#58;&amp;#47;&amp;#47;msc.wlxrs.com&amp;#47;Yab6BLiyg7PTichbq0kh4A&amp;#47;images&amp;#47;icons&amp;#47;Small&amp;#47;Zip.png" alt="DSP_Tools_9.2.01.1028.part3.rar" /&gt;</description>
        </item>
        <item>
            <title>Wiley.Advanced.FPGA.Design.Jun.2007.pdf</title>
            <link>http://cid-fde2b41588160e26.skydrive.live.com/self.aspx/FPGA/Wiley.Advanced.FPGA.Design.Jun.2007.pdf</link>
            <pubDate>Sun, 16 Nov 2008 00:57:43 GMT</pubDate>
            <description>&lt;img src="http&amp;#58;&amp;#47;&amp;#47;msc.wlxrs.com&amp;#47;Yab6BLiyg7PTichbq0kh4A&amp;#47;images&amp;#47;icons&amp;#47;Small&amp;#47;Default.png" alt="Wiley.Advanced.FPGA.Design.Jun.2007.pdf" /&gt;</description>
        </item>
        <item>
            <title>Circuit design with VHDL by Volnei A. Pedroni.pdf</title>
            <link>http://cid-fde2b41588160e26.skydrive.live.com/self.aspx/FPGA/Circuit%20design%20with%20VHDL%20by%20Volnei%20A.%20Pedroni.pdf</link>
            <pubDate>Sun, 16 Nov 2008 00:51:30 GMT</pubDate>
            <description>&lt;img src="http&amp;#58;&amp;#47;&amp;#47;msc.wlxrs.com&amp;#47;Yab6BLiyg7PTichbq0kh4A&amp;#47;images&amp;#47;icons&amp;#47;Small&amp;#47;Default.png" alt="Circuit&amp;#32;design&amp;#32;with&amp;#32;VHDL&amp;#32;by&amp;#32;Volnei&amp;#32;A.&amp;#32;Pedroni.pdf" /&gt;</description>
        </item>
        <item>
            <title>COMPLETE DIGITAL DESIGN.pdf</title>
            <link>http://cid-fde2b41588160e26.skydrive.live.com/self.aspx/FPGA/COMPLETE%20DIGITAL%20DESIGN.pdf</link>
            <pubDate>Sun, 16 Nov 2008 00:51:31 GMT</pubDate>
            <description>&lt;img src="http&amp;#58;&amp;#47;&amp;#47;msc.wlxrs.com&amp;#47;Yab6BLiyg7PTichbq0kh4A&amp;#47;images&amp;#47;icons&amp;#47;Small&amp;#47;Default.png" alt="COMPLETE&amp;#32;DIGITAL&amp;#32;DESIGN.pdf" /&gt;</description>
        </item>
        <item>
            <title>DEPARTMENT OF DEFENSE HANDBOOK DOCUMENTATION OF DIGITAL ELECTRONIC SYSTEMS WITH VHDL.pdf</title>
            <link>http://cid-fde2b41588160e26.skydrive.live.com/self.aspx/FPGA/DEPARTMENT%20OF%20DEFENSE%20HANDBOOK%20DOCUMENTATION%20OF%20DIGITAL%20ELECTRONIC%20SYSTEMS%20WITH%20VHDL.pdf</link>
            <pubDate>Sun, 16 Nov 2008 00:51:31 GMT</pubDate>
            <description>&lt;img src="http&amp;#58;&amp;#47;&amp;#47;msc.wlxrs.com&amp;#47;Yab6BLiyg7PTichbq0kh4A&amp;#47;images&amp;#47;icons&amp;#47;Small&amp;#47;Default.png" alt="DEPARTMENT&amp;#32;OF&amp;#32;DEFENSE&amp;#32;HANDBOOK&amp;#32;DOCUMENTATION&amp;#32;OF&amp;#32;DIGITAL&amp;#32;ELECTRONIC&amp;#32;SYSTEMS&amp;#32;WITH&amp;#32;VHDL.pdf" /&gt;</description>
        </item>
        <item>
            <title>FPGA Prototyping VHDL Examples - Xilinx Spartan-3 Version.pdf</title>
            <link>http://cid-fde2b41588160e26.skydrive.live.com/self.aspx/FPGA/FPGA%20Prototyping%20VHDL%20Examples%20-%20Xilinx%20Spartan-3%20Version.pdf</link>
            <pubDate>Sun, 16 Nov 2008 00:51:32 GMT</pubDate>
            <description>&lt;img src="http&amp;#58;&amp;#47;&amp;#47;msc.wlxrs.com&amp;#47;Yab6BLiyg7PTichbq0kh4A&amp;#47;images&amp;#47;icons&amp;#47;Small&amp;#47;Default.png" alt="FPGA&amp;#32;Prototyping&amp;#32;VHDL&amp;#32;Examples&amp;#32;-&amp;#32;Xilinx&amp;#32;Spartan-3&amp;#32;Version.pdf" /&gt;</description>
        </item>
        <item>
            <title>HDL Chip Design- A Practical Guide for Designing, Synthesizing and Simulating ASICs and FPGAs Using VHDL or Verilog.pdf</title>
            <link>http://cid-fde2b41588160e26.skydrive.live.com/self.aspx/FPGA/HDL%20Chip%20Design-%20A%20Practical%20Guide%20for%20Designing^J%20Synthesizing%20and%20Simulating%20ASICs%20and%20FPGAs%20Using%20VHDL%20or%20Verilog.pdf</link>
            <pubDate>Sun, 16 Nov 2008 00:51:34 GMT</pubDate>
            <description>&lt;img src="http&amp;#58;&amp;#47;&amp;#47;msc.wlxrs.com&amp;#47;Yab6BLiyg7PTichbq0kh4A&amp;#47;images&amp;#47;icons&amp;#47;Small&amp;#47;Default.png" alt="HDL&amp;#32;Chip&amp;#32;Design-&amp;#32;A&amp;#32;Practical&amp;#32;Guide&amp;#32;for&amp;#32;Designing,&amp;#32;Synthesizing&amp;#32;and&amp;#32;Simulating&amp;#32;ASICs&amp;#32;and&amp;#32;FPGAs&amp;#32;Using&amp;#32;VHDL&amp;#32;or&amp;#32;Verilog.pdf" /&gt;</description>
        </item>
        <item>
            <title>RTL Hardware Design Using VHDL.pdf</title>
            <link>http://cid-fde2b41588160e26.skydrive.live.com/self.aspx/FPGA/RTL%20Hardware%20Design%20Using%20VHDL.pdf</link>
            <pubDate>Sun, 16 Nov 2008 00:57:44 GMT</pubDate>
            <description>&lt;img src="http&amp;#58;&amp;#47;&amp;#47;msc.wlxrs.com&amp;#47;Yab6BLiyg7PTichbq0kh4A&amp;#47;images&amp;#47;icons&amp;#47;Small&amp;#47;Default.png" alt="RTL&amp;#32;Hardware&amp;#32;Design&amp;#32;Using&amp;#32;VHDL.pdf" /&gt;</description>
        </item>
        <item>
            <title>Newnes.Digital.Systems.Design.with.FPGAs.and.CPLDs.Mar.2008.pdf</title>
            <link>http://cid-fde2b41588160e26.skydrive.live.com/self.aspx/FPGA/Newnes.Digital.Systems.Design.with.FPGAs.and.CPLDs.Mar.2008.pdf</link>
            <pubDate>Sun, 16 Nov 2008 00:57:45 GMT</pubDate>
            <description>&lt;img src="http&amp;#58;&amp;#47;&amp;#47;msc.wlxrs.com&amp;#47;Yab6BLiyg7PTichbq0kh4A&amp;#47;images&amp;#47;icons&amp;#47;Small&amp;#47;Default.png" alt="Newnes.Digital.Systems.Design.with.FPGAs.and.CPLDs.Mar.2008.pdf" /&gt;</description>
        </item>
        <item>
            <title>Microprocessor Design Principles and Practices With VHDL.pdf</title>
            <link>http://cid-fde2b41588160e26.skydrive.live.com/self.aspx/FPGA/Microprocessor%20Design%20Principles%20and%20Practices%20With%20VHDL.pdf</link>
            <pubDate>Sun, 16 Nov 2008 00:57:46 GMT</pubDate>
            <description>&lt;img src="http&amp;#58;&amp;#47;&amp;#47;msc.wlxrs.com&amp;#47;Yab6BLiyg7PTichbq0kh4A&amp;#47;images&amp;#47;icons&amp;#47;Small&amp;#47;Default.png" alt="Microprocessor&amp;#32;Design&amp;#32;Principles&amp;#32;and&amp;#32;Practices&amp;#32;With&amp;#32;VHDL.pdf" /&gt;</description>
        </item>
    </channel>
</rss>